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21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PS301/PS302/PS303
Precision, Single-Supply SPST Analog Switches
Features
* Low On-Resistance (33 typ) Minimizes Distortion and Error Voltages * Low Glitching Reduces Step Errors in Sample-and-Holds. Charge Injection, 2pC typ * Single-Supply Operation (+2.5V to +16V) * Improved Second Sources for MAX4501/MAX4502 * On-Resistance Matching Between Channels, <2 * On-Resistance Flatness, <6 max * Low Off-Channel Leakage, <5nA @ +85oC * TTL/CMOS Logic Compatible * Fast Switching Speed, tON < 150ns * Guaranteed Break-Before-Make action (PS303 only) eliminates momentary crosstalk * Rail-to-Rail Analog Signal Dynamic Range * Low Power Consumption, <5W * MSOP Package minimizes board area
Description
The PS301/PS302/PS303 are improved high precision, medium voltage analog switches designed to operate with single power supplies. The PS301 is a single-pole single-throw (SPST), normally open (NO) switch. The PS302 has the same pinout as the PS301 but is a normally closed (NC) switch. The PS303 has one normally open (NO) and one normally closed (NC) switch per package. Each switch conducts current equally well in either direction when on. In the off state each switch blocks voltages up to the power-supply rail. With a +5V power supply, the PS301/PS302/PS303 guarantee <60 ON-resistance. ON-resistance matching between channels is within 2. ON-resistance flatness is less than 6 over the specified range. All three devices guarantee low leakage currents (<100pA @ 25oC, <10nA @ +85oC) and fast switching speeds (tON < 150ns). Break-before-make switching action protects against momentary crosstalk (PS303). For single-supply operation below 5V, the PI5A317/318/319 are also recommended.
Applications
* * * * * * Audio, Video Switching and Routing Portable Instruments Data Acquisition Systems Sample-and-Holds Telecommunication Systems Battery-Powered Systems
Functional Diagrams, Pin Configurations, and Truth Tables
Top Views
COM N.C. N.C. V+ 1 2 3 4 PS301 8 7 6 5 NO GND IN N.C.
COM N.C. N.C. V+
1 2 3 4 PS302
8 7 6 5
NC GND IN N.C.
NO COM NC GND
1 2 3 4 PS303
8 7 6 5
V+ IN N.C. N.C.
Switches shown for logic "0" input
PS301 Logic Switch
PS302 Logic 0 1 Switch ON O FF Logic 0 1
PS303 NC ON O FF NO O FF ON
0 1
O FF ON
For free samples and the latest literature: www.pericom.com, or phone 1-800-435-2336
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PS8187A 06/29/99
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PS301/PS302/PS303 Precision, Single Supply SPST Analog Switches
Absolute Maximum Ratings
Voltages Referenced to GND V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +17V VIN, VCOM, VNC, VNO (Note 1) . . . . . . . . . -2V to (V+) +2V or 30mA, whichever occurs first Current (any terminal) . . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA Peak Current, COM, NO, NC (pulsed at 1ms, 10% duty cycle) . . . . . . . . . . . . . . . . . . 100mA ESD per Method 3015.7 . . . . . . . . . . . . . . . . . . . . . . . >2000V
Thermal Information
Continuous Power Dissipation Plastic DIP (derate 6mW/ C above +70C) . . . . . . . . . 500mW Narrow SO (derate 6mW/ C above +70C) . . . . . . . . 450mW MSOP (derate 4mW/ C above +70C) . . . . . . . . . . . . 330mW Storage Temperature . . . . . . . . . . . . . . . . . . -65C to +150C Lead Temperature (soldering, 10s) . . . . . . . . . . . . . . . +300C Note 1: Signals on NC, NO, COM, or IN exceeding V+ or GND are clamped by internal diodes. Limit forward diode current to 30mA maximum.
Caution: Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied.
Electrical Specifications - Single +5V Supply (V+ = 5V +10%, GND = 0V, VINH = 2.4V, VINL = 0.8V)
Parame te r Analog Switch Analog Signal Range (3) On Resistance VANALOG RON V+ = 4.5V, VNO or VNC = +3.5V, ICOM = 1mA VNO or VNC = +3V, ICOM = 1mA, V+ = 5V Full 25 Full On- Resistance Match Between Channels(4) RON 25 Full V+ = 5V, ICOM =1mA , VNO or VNC = 1V, 2V, 3V, V+ = 5.5V, VCOM = 1V, VNO or VNC = 4.5V V+ = 5.5V, VCOM = 4.5V, VNO or VNC = 1V V+ = 5.5V , VCOM = 5V, VNO or VNC = 5V 25 Full 25 Full 25 Full 25 Full 0.1 5 0.1 5 0.2 10 0.04 0.01 0.01 2 0.8 0 33 V+ 60 75 2 4 6 8 0.1 5 0.1 5 0.2 10 nA V Symbol Conditions Te mp. (C) M in(2) Typ(1) M ax(2) Units
On- Resistance Flatness(5)
RFLAT(ON)
NO or NC Off Leakage Current(6)
INO(OFF) or INC(OFF)
COM Off Leakage Current(6)
ICOM(OFF)
COM On Leakage Current(6) Logic Input Input Current with Input Voltage High Input Current with Input Voltage Low Logic High Input Voltage Logic Low Input Voltage
ICOM(ON)
IINH IINL VINH VINL
VIN = 2.4V, all others = 0.8V VIN = 0.8V, all others = 2.4V
Full
0.5 0.5 2.4
0.005 0.005
0.5 A 0.5
V 0.8
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PS8187A
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21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PS301/PS302/PS303 Precision, Single Supply SPST Analog Switches
Electrical Specifications - Single +5V Supply (continued)
(V + = 5V 10%, GND = 0V, VINH =2.4V, VINL = 0.8V)
Parame te r Dynamic Turn- On Time tON tOFF tD Q OIRR XTALK C(OFF) CCOM(OFF) CCOM(ON) V+ I+ V+ = 5.5V, VIN = 0V or V+, all channels on or off Full f =1MHz, Figure 8 PS303 only, RL = 300, CL= 35pF, Fig. 3 CL= 1nF, VGEN = 0V, RGEN = 0, Fig. 4 RL = 50, CL = 5pF, f = 1MHz, Fig. 5 RL = 50, CL = 5pF, f = 1MHz, Fig. 6 25 25 VNO or VNC = 3V, Figure 2 Full 25 Full 2 5 1 72 85 9 f =1MHz, Figure 7 9 22 pF 5 pC dB 25 85 150 240 100 150 ns Symbol Conditions Te mp. (C) M in(1) Typ(2) M ax(1) Units
Turn- Off Time Break- Before- Make TimeDelay(3) Charge Injection(3) Off Isolation(7) Crosstalk NC or NO Off Capacitance COM Off Capacitance COM On Capacitance Supply Power- Supply Range Positive Supply Current
2.7 1
16 1
V A
Notes: 1. The algebraic convention, where the most negative value is a minimum and the most positive is a maximum, is used in this data sheet. 2. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing. 3. Guaranteed by design 4. R = R max. - R min. 5. Flatness is defined as the difference between the maximum and minimum value of on-resistance measured. 6. Leakage parameters are 100% tested at maximum rated hot temperature and guaranteed by correlation at +25C. 7. Off Isolation = 20log10 [VCOM / (VNCor VNO)]. See Figure 5.
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PS8187A
06/29/99
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PS301/PS302/PS303 Precision, Single Supply SPST Analog Switches
Electrical Specifications - Single +12V Supply
(V+ = 12V 10%, GND = 0V, VINH = 5V, VINL = 0)
Parame te r Analog Switch Analog Signal Range(3) On- Resistance Dynamic Turn- On Time(3) tON VNO or VNC = 6V, Figure 2 Turn- Off Time(3) Break- Before- Make Time Delay(3) Charge Injection(3) Supply Positive Supply Current I+ V+ = 13.2V, VIN = 0V or V+, all channels on or off Full 1 0.01 1 A tOFF PS303 only CL = 1nF, VGEN = 6V, RGEN = 0, Figure 4 25 Full 25 Full 25 25 2 5 pC 25 85 150 240 100 150 ns VANALOG RON V+ =12V, ICOM = 1mA, VNO or VNC = 6V 25 Full 0 14 V+ 35 45 V Symbol Conditions Te mp (C) M in(1) Typ(2) M ax(1) Units
tD Q
Electrical Specifications - Single +3.3V Supply
(V+ = 3.3V 10%, GND = 0V, VINH = 2.4V, VINL = 0.8V)
Parame te r Analog Switch Analog Signal Range(3) On- Resistance Dynamic Turn- On Time(3) tON VNO or VNC = 1.5V, Figure 2 Turn- Off Time(3) Break- Before- Make Time Delay(3) Charge Injection(3) Supply Positive Supply Current I+ V+ = 3.6V, VIN = 0V or V+, all channels on or off Full 1 0.01 1 A tOFF tD Q PS303 only CL = 1nF, VGEN = 0V, RGEN = 0, Figure 4 25 Full 25 Full 25 25 2 5 1 5 pC 40 160 400 500 125 175 ns VANALOG RON V+ = 3V, ICOM = 1mA, VNO or VNC = 1.5V 25 Full 0 83 V+ 175 275 V Symbol Conditions Te mp (C) M in(1) Typ(2) M ax(1) Units
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PS8187A
06/29/99
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PS301/PS302/PS303 Precision, Single Supply SPST Analog Switches
Test Circuits/Timing Diagrams
+5V V+ VCOM = 3V COM NO or NC RL 1k VOUT CL 35pF Switch Output 0V tON Logic +3V Input 0V 50% tr <20ns tf <20ns tOFF VOUT 90% 90%
IN Logic Input GND
CL INCLUDES FIXTURE AND STRAY CAPACITANCE RL VOUT = VCOM RL + RON
(
)
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES THAT HAVE OPPOSITE LOGIC
Figure 2. Switching Time
V+ V+ +3V NC NO IN Logic Input GND RL 300 CL 35pF Switch Output 90% VOUT 0V CLINCLUDES FIXTURE AND STRAY CAPACITANCE. tD NO1 V OUT Logic +3V Input 0V
50%
90%
Figure 3. Break-Before-Make Interval (PS303 only)
+5V V+ COM NO or NC CL IN Logic Input GND
1nF
RGEN VGEN
VOUT VOUT IN OFF ON ON
VOUT
OFF
IN
OFF
OFF
Q = (VOUT)(CL) IN POLARITY DEPENDS ON NO OR NC SWITCH FUNCTION
Figure 4. Charge Injection
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PS8187A
06/29/99
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PS301/PS302/PS303 Precision, Single Supply SPST Analog Switches
Test Circuits/Timing Diagrams (continued)
10nF +5V
10nF Signal Generator 0dBm +5V
V+ COM IN COM Analyzer RL NC or NO GND 0V or 2.4V
COM1
V+
N01
50
0V or 3.5V COM Analyzer RL 50
IN1
IN2
0V or 2.4V
N02 GND
COM2
NC
Figure 5. Off Isolation
+5V
Figure 6. Crosstalk
10nF
10nF
+5V
V+ COM Capacitance Meter f = 1kHz IN NC or NO GND 0V or 2.4V
Capacitance Meter f = 1kHz COM
V+
IN NC or NO GND
0V or 2.4V
Figure 7. Channel-Off Capacitance
Figure 8. Channel-On Capacitance
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PS8187A
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Ordering Information
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PS301/PS302/PS303 Precision, Single Supply SPST Analog Switches
Applications Information
Overvoltage Protection Proper power-supply sequencing is recommended for all CMOS devices. Do not exceed the absolute maximum ratings, because stresses beyond the listed ratings may cause permanent damage to the devices. Always sequence V+ on first, and then logic inputs. If power-supply sequencing is not possible, add two small signal diodes or two current limiting resistors in series with the supply pins for overvoltage protection (Figure 1). Adding diodes reduces the analog signal range, but low switch resistance and low leakage characteristics are unaffected. Logic Levels When powered from +5V the PS301/PS302/PS303 can be operated with either TTL- or CMOS-Logic levels. If V+ is different than +5V, the logic threshold level will vary. Power consumption is minimal when the logic control voltages reach V+ or GND.
Positive Supply
V+
NO
COM
Vg V-
GND Figure 1. Overvoltage protection is accomplished by using two external blocking diodes or two current limiting resistors.
Part
PS301CPA PS301CSA PS301CUA PS301EPA PS301ESA PS302CPA PS302CSA PS302CUA
Te mp. R ange
0C to +70C 0C to +70C 0C to +70C 40C to +85C 40C to +85C 0C to +70C 0C to +70C 0C to +70C
Pack age
8 Plastic DIP 8 N arrow SO 8 MSO P 8 Plastic DIP 8 N arrow SO 8 Plastic DIP 8 N arrow SO 8 MSO P
Part
PS302EPA PS302ESA PS303CPA PS303CSA PS303CUA PS303EPA PS303ESA
Te mp. R ange 40C to +85C 40C to +85C
0C to +70C 0C to +70C 0C to +70C
Pack age
8 Plastic DIP 8 N arrow SO 8 Plastic DIP 8 N arrow SO 8 MSO P 8 Plastic DIP 8 N arrow SO
40C to +85C 40C to +85C
Pericom Semiconductor Corporation 2380 Bering Drive * San Jose, CA 95131 * 1-800-435-2336 * Fax (408) 435-1100 * http://www.pericom.com
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PS8187A 06/29/99

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